Wong, Hiu Yung

Photo

Associate Professor

M-PAC Lab

Introduction to Quantum Computing: From a Layperson to a Programmer in 30 Steps: ;  
Book

Quantum Computing Architecture and Hardware for Engineers: Step by Step: ;  

Quantum Computing Architectures

Email

Preferred: hiuyung.wong@sjsu.edu

Telephone

Preferred: 408-924-3910

Education

  • Ph.D. EECS, University of California, Berkeley (2006)
  • M.Phil. Computer Science and Engineering, Chinese University of Hong Kong (2001)
  • B. Eng. Computer Engineering, Chinese University of Hong Kong (1999)

Bio

Hiu Yung Wong is an Associate Professor at San Jose State University. He received his Ph.D. degree in Electrical Engineering and Computer Science from the University of California, Berkeley in 2006. From 2006 to 2009, he worked as a Technology Integration Engineer at Spansion. From 2009 to 2018, he was a TCAD Senior Staff Application Engineer at Synopsys.


He received the Industry Sponsored Research Award and ERFA RSCA Award in 2024, the AMDT Endowed Chair Award, the Curtis W. McGraw Research Award from ASEE Engineering Research Council in 2022, the NSF CAREER award and the Newnan Brothers Award for Faculty Excellence in 2021, and the Synopsys Excellence Award in 2010. He is the author of two books, "Introduction to Quantum Computing: From a Layperson to a Programmer in 30 Steps" and "Quantum Computing Architecture and Hardware for Engineers: Step by Step". He is one of the founding faculty members of the Master of Science in Quantum Technology at San Jose State University.


His research interests include the application of machine learning in simulation and manufacturing, cryogenic electronics, quantum computing, and wide bandgap device simulations. His works have produced 2 books, 1 book chapter, more than 120 papers, and 10 patents.

Major Awards:

  • Emeritus and Retired Faculty Association Faculty Research and Creative Activity Award, 2024-2025
  • 2023 Industry Sponsored Research Award
  • 2022 Curtis W. McGraw Research Award (ASEE Engineering Research Council).
  • Silicon Valley AMDT Endowed Chair in Electrical Engineering, 2022
  • NSF CAREER Award, 2021
  • Newnan Brothers Award for Faculty Excellence, 2021.
  • Synopsys Excellence Award (1 out of every ~500 employees), 2010
  • Sir Edward Youde Memorial Fellowships for Overseas Studies, 2001

Services:

  • Vice Chair, Academic Senate (Fall 2025 - )
  • Chair, Curriculum & Research Committee, Academic Senate (Spring 2023 - Spring 2025)
  • Senator (Fall 2022 - ), San Jose State University (office hour 1pm-2pm Monday. Please email me for Zoom link.)
  • EE Graduate Advisor (2023 -)
  •  Editors:
    • Editor, Journal of Electron Devices Society

    • Associate Editor, IEEE Access

    • Guest Editor, JVST-B,
  • Co-Chair and Technical Program Chair, International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2024)
  • Technical Program Committee (TPC) for International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2020-)
  • Co-Chair,
  • Secretary (2018 -2019) Treasurer (2019-2021) Chair (2022 - )
  • executive committee board (2018 - )
  • Senior Member of Institute of Electrical and Electronics Engineers (IEEE)
  • Workshop Moderator: “(IRPS)
  • Reviewer: IEEE Electron Device Letter (EDL) and others
  • Judge: The Synopsys Championship (the Santa Clara County science fair for students in grades 6-12), Sciencepalooza! (for students in grades 9-12 in East San José)

Classes:

 

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